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vishay siliconix SIC778A document number: 63808 s12-1132-rev. b, 21-may-12 www.vishay.com 1 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical support, please contact: powerictechsupport@vishay.com high performance drmos C integrated power stage description the sic778 is an integrated power stage solution optimized for synchronous buck applications offering high current, high efficiency and high power density. packaged in vishay?s proprietary 6 mm x 6 mm mlp package, sic778 enables voltage regulator designs to deliver in excess of 40 a per phase current with 91 % peak efficiency. the internal power mosfets utilize vishay?s state-of-the-art trenchfet gen iii technology that delivers industry bench-mark performance by significantly reducing switching and conduction losses. the sic778 incorporates an advanced mosfet gate driver ic that features high current driving capability, adaptive dead-time control, an integrat ed bootstrap schottky diode, and a thermal warning (thdn) that alerts the system of excessive junction temperature. the driver is also compatible with a wide range of pwm controllers and supports tri-state pwm, 3.3 v (SIC778Acd) pwm logic, and skip mode (smod) to improve light load efficiency. features ? thermally enhanced powerpak ? mlp6x6-40l package ? industry benchmark mosfet with integrated schottky diode ? delivers in excess of 40 a continuous current ? 91 % peak efficiency ? high frequency operation up to 1 mhz ? power mosfets optimized for 12 v input stage ? 3.3 v pwm logic with tri-state and hold-off ? smod logic for light load efficiency boost ? low pwm propagation delay (< 20 ns) ? thermal monitor flag ? enable feature ?v cin uvlo ? compliant with intel drmos 4.0 specification ? material categorization: for definitions of compliance please see www.vishay.com/doc?99912 applications ? synchronous buck converters ? multi-phase vrds for cpu, gpu, and memory ? dc/dc pol modules typical application diagram figure 1: sic778 typical application diagram
www.vishay.com 2 document number: 63808 s12-1132-rev. b, 21-may-12 vishay siliconix SIC778A this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical support, please contact: powerictechsupport@vishay.com pin configuration figure 2 - sic778 pin co nfiguration (bottom view) pin description pin number symbol description 1 smod# ls fet turn-off logic. active low 2v cin supply voltage for internal logic circuitry 3v drv supply voltage for internal gate driver 4 boot high side driver bootstrap voltage 5, 37, p1 c gnd analog ground for the driver ic 6 gh high side gate signal 7 phase return path of hs gate driver 8 to 14, p2 v in power stage input voltage. drain of high side mosfet 15, 29 to 35, p3 v swh phase node of the power stage 16 to 28 p gnd power ground 36 gl low side gate signal 38 thdn thermal shutdown open drain output 39 dsbl# disable pin. active low 40 pwm pwm input logic
document number: 63808 s12-1132-rev. b, 21-may-12 www.vishay.com 3 vishay siliconix SIC778A this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical support, please contact: powerictechsupport@vishay.com note: 1. stresses beyond those listed under ??absolu te maximum ratings?? may cause permanent damage to the device. these are stress ra tings only, and functional operation of the device at these or any other conditions beyond t hose indicated in the operational sections of the specifications is not implied. exposure to absol ute maximum rating conditions for extended periods may affect device reliability. ordering information part number package marking code SIC778Acd-t1-ge3 powerpak mlp66-40l SIC778A sic778db reference board absolute maximum ratings (1) electrical parameter symbol limits unit input voltage v in - 0.3 to 20 v control input voltage v cin - 0.3 to 7 drive input voltage v drv - 0.3 to 7 switch node (dc) v sw - 0.3 to 20 boot voltage (dc voltage) v bs - 0.3 to 27 boot to switching node (dc voltage) v bs_sw - 0.3 to 7 all logic inputs and outputs (pwm, dsbl, smod and thdn) - 0.3 to v cin + 0.3 max. operating junction temperature t j 150 c ambient temperature t a - 40 to 125 storage temperature - 65 to 150 recommended operating conditions parameter min. typ. max. unit input voltage (v in )4.5 18 v drive input voltage (v drv ) 4.5 5 5.5 control input voltage (v cin ) 4.5 5 5.5 switching node (lx, dc voltage) 19 boot-sw 4 4.5 5.5 thermal resistance ratings parameter min. typ. max. unit thermal resistance from junction to case (to p3 pad v swp signal) 2.5 c/w thermal resistance from junction to pcb 5 electrical specifications parameter symbol test conditions unless specified v dsbl# = 5 v, v smod = 5 v, v in = 12 v, v drv = v cin = 5 v, t a = 25 c min. (2) typ. (1) max. (2) unit power supplies control logic input current i vcin v dsbl# = 0 v, no switching 100 a v dsbl# = 5 v, no switching 300 v dsbl# = 5 v, f s = 300 khz, d = 0.1 300 drive input current (dynamic) i vdrv f s = 300 khz, d = 0.1 16 25 ma f s = 1 mhz, d = 0.1 60 drive input current (no switching) v dsbl# = 0 v, no switching 30 a v dsbl# = 5 v, no switching 60
www.vishay.com 4 document number: 63808 s12-1132-rev. b, 21-may-12 vishay siliconix SIC778A this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical support, please contact: powerictechsupport@vishay.com notes: 1.typical limits are establ ished by characterization and are not production tested. 2.min. and max. not 100 % production tested. 3.guaranteed by design. bootstrap supply bootstrap switch forward voltage v f v cin = 5 v, forward bias current 2 ma 0.4 v pwm control input (SIC778Acd) rising threshold v th_pwm_r 2.1 2.4 2.8 v falling threshold v th_pwm_f 0.7 0.9 1.2 tri-state voltage v tri pwm pin floating 1.8 tri-state rising threshold v th_tri_r 0.9 1.5 tri-state falling threshold v th_tri_f 1.9 2.2 2.6 tri-state rising thre shold hysteresis v hys_tri_r 225 mv tri-state falling threshold hysteresis v hys_tri_f 275 pwm input current i pwm v pwm = 3.3 v 300 a v pwm = 0 v - 300 timing specifications tri-state to gh/gl rising propagation delay t pd_r_tri no load, see fig. 4. 20 ns tri-state hold-off time t tsho 150 gh - turn off propagation delay t pd_off_gh 20 gh - turn on propagation delay (dead time rising) t pd_on_gh 10 gl - turn off propagation delay t pd_off_gl 20 gl - turn on propagation delay (dead time falling) t pd_on_gl 10 dsbl# high to gh/gl rising propagation delay t pd_r_dsbl 22 dsbl# low to gh/gl falling propagation delay t pd_f_dsbl 10 dsbl#, smod input dsbl# logic input voltage v dsbl enable 2 v disenable 0.8 smod logic input voltage v smod high state 2 low state 0.8 protection under voltage lockout v uvlo rising, on threshold 3.7 4.3 v falling, off threshold 2.7 3.2 under voltage lockout hysteresis note 3 550 mv thdn flag set 160 c thdn flag clear 135 thdn flag hysteresis 25 thdn output low 0.02 v electrical specifications parameter symbol test conditions unless specified v dsbl# = 5 v, v smod = 5 v, v in = 12 v, v drv = v cin = 5 v, t a = 25 c min. (2) typ. (1) max. (2) unit
document number: 63808 s12-1132-rev. b, 21-may-12 www.vishay.com 5 vishay siliconix SIC778A this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical support, please contact: powerictechsupport@vishay.com detailed operational description pwm input with tri-state function the pwm input receives the pwm control signal from the vr controller ic. the pwm input is designed to be compatible with standard controllers using two state logic (h and l) and advanced controllers that incorporate tri-state logic (h, l, and tri-state) on the pwm output. for two state logic, the pwm input operates as follows. when pwm is driven above v th _pwm_r the low side is turned off and the high side is turned on. when pwm input is driven below v th _pwm_f the high side turns off and the low side turns on. for tri-state logic, the pwm input operates as above for driving the mosfets. however, there is an third state that is entered into as t he pwm output of tri-state compatible controller enters it s high impedance state during shut-down. the high impedanc e state of the controller's pwm output allows the SIC778A to pull the pwm input into the tri-state region (see the tri-state voltage threshold diagram below). if the pwm input stays in this region for the tri-state hold-off period, t tsho , both high side and low side mosfets are turned off. this function allows the vr phase to be disabled without negative output voltage swing caused by inductor ringing and saves a schottky diode clamp. the pwm and tri-st ate regions are separated by hysteresis to prevent fa lse triggering. the SIC778Acd incorporates pwm voltage thre sholds that are compatible with 3.3 v logic. disable (dsbl#) in the low state, the dsbl# pin shuts down the driver ic and disables both high-side and low-side mosfet. in this state, the standby current is minimized. if dsbl# is left unconnected an internal pull-down resistor will pull the pin down to c gnd and shut down the ic. diode emulation mode (smod) skip when smod pin is low the diode emulation mode is enabled and gl is turned off. this is a non-synchronous conversion mode that improves light load efficiency by reducing switching losses. conducted losses that occur in synchronous buck regulators when inductor current is negative can also be reduced. circuitry in the external controller ic detects when inductor current crosses zero and drive smod lo turning the low side mosfet off. see smod operation diagram for additional details. this function can be also be used for a pre-biased output voltage. if smod is left unconnected, an internal pull up resistor will pull the pin up to v cin (logic high) to disable the smod function. thermal shutdown warning (thdn) the thdn pin is an open drain signal that flags the presence of excessive junction temperature. connect a maximum of 20 k ? to pull this pin up to v cin . an internal temperature sensor detects the junction temperature. the temperature threshold is 160 c. when this junction temperature is exc eeded the thdn flag is set. when the junction temperature drops below 135 c the device will clear the thdn signal. the sic778 does not stop operation when the flag is set. the decision to shutdown must be made by an external thermal control function. voltage input (v in ) this is the power input to the drain of the high-side power mosfet. this pin is connected to the high power intermediate bus rail. switch node (v swh and phase) the switch node v swh is the circuit pwm regulated output. this is the output applied to the filter circuit to deliver the regulated high output for the buck converter. the phase pin is internally connected to the switch node v swh . this pin is to be used exclusively as the return pin for the boot capacitor. a 20.2 k ? resistor is connected between gh and phase to provide a discharge pa th for the hs mosfet in the event that v cin goes to zero while v in is still applied. ground connections (c gnd and p gnd ) p gnd (power ground) should be externally connected to c gnd (control signal ground). the layout of the printed circuit board should be such that the inductance separating the c gnd and p gnd should be a minimum. transient differences due to inductance effects between these two pins should not exceed 0.5 v. control and drive supply voltage input (v drv , v cin ) v cin is the bias supply for th e gate drive control ic. v drv is the bias supply for the gate drivers. it is recommended to separate these pins through a resistor. this creates a low pass filtering effect to avoid coupling of high frequency gate drive noise into the ic. bootstrap circuit (boot) the internal bootstrap switch and an external bootstrap capacitor form a charge pump that supplies voltage to the boot pin. an integrated boot strap diode is incorporated so that only an external capacitor is necessary to complete the bootstrap circuit. connect a boot strap capacitor with one leg tied to boot pin and t he other tied to phase pin. shoot-through protection and adaptive dead time shoot-through protection and adaptive dead time (ast) the SIC778A has an internal adaptive logic to avoid shoot through and optimize dead time. the shoot through protection ensures that both high-side and low-side mosfet are not turned on the same time. the adaptive dead time control operates as follows. the hs and ls gate voltages are monitored to prev ent the one turning on until the other?s gate voltage is sufficiently low (1 v), that and built in delays ensure the one power mos is completely off, before the other can be turned on. this feature helps to adjust dead time as gate transitions change with respect to output current and temperature.
www.vishay.com 6 document number: 63808 s12-1132-rev. b, 21-may-12 vishay siliconix SIC778A this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical support, please contact: powerictechsupport@vishay.com under voltage lockout (uvlo) during the start up cycle, the uv lo disables the gate drive holding high-side and low-side mosfet gate low until the input voltage rail has reached a point at which the logic circuitry can be safely activated. the SIC778A also incorporates logic to clamp the gate drive signals to zero when the uvlo falling edge triggers the shutdown of the device. as an added precaution, a 20.2 k ? resistor is connected between gh and phase to provide a discharge path for the hs mosfet. functional block diagram figure 3: sic778 functional block diagram device truth table dsbl# smod pwm gh gl open xxl l l xxl l h llll h lhhl h hhhl h hllh h ltri-statel l h htri-statel l
vishay siliconix SIC778A document number: 63808 s12-1132-rev. b, 21-may-12 www.vishay.com 7 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical support, please contact: powerictechsupport@vishay.com definition of pwm logic and tri-state smod operation diagram figure 4: definition of pwm logic and tri-state figure 5: ccm operation with smod# = high pwm gh il gl 0v smod# 0a figure 6: dcm operation with smod# = active toggle pwm 0v gh il gl 0a smod# 10ns
www.vishay.com 8 document number: 63808 s12-1132-rev. b, 21-may-12 vishay siliconix SIC778A this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical support, please contact: powerictechsupport@vishay.com electrical characteristics start-up with v in ramping up v in = 12 v, v out = 1.2 v, f sw = 500 khz start-up with dsbl# toggle high v in = 12 v, v out = 1.2 v, f sw = 500 khz start-up with pwm existing tri-state v in = 12 v, v out = 1.2 v, f sw = 500 khz power off with v in ramping down v in = 12 v, v out = 1.2 v, f sw = 500 khz shut-down with dsbl# toggle low v in = 12 v, v out = 1.2 v, f sw = 500 khz shut-down with pwm entreing tri-state v in = 12 v, v out = 1.2 v, f sw = 500 khz
vishay siliconix SIC778A document number: 63808 s12-1132-rev. b, 21-may-12 www.vishay.com 9 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical support, please contact: powerictechsupport@vishay.com electrical characteristics start-up with v drv /v cin ramping up v in = 12 v, v out = 1.2 v, f sw = 500 khz switching waveform at pwm rising edge v in = 12 v, v out = 1.2 v, f sw = 500 khz, i out = 0 a switching waveform at pwm rising edge v in = 12 v, v out = 1.2 v, f sw = 500 khz, i out = 30 a power off with v drv /v cin ramping down v in = 12 v, v out = 1.2 v, f sw = 500 khz, i out = 1.2 a switching waveform at pwm falling edge v in = 12 v, v out = 1.2 v, f sw = 500 khz switching waveform at pwm falling edge v in = 12 v, v out = 1.2 v, f sw = 500 khz, i out = 30 a
www.vishay.com 10 document number: 63808 s12-1132-rev. b, 21-may-12 vishay siliconix SIC778A this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical support, please contact: powerictechsupport@vishay.com electrical characteristics typical efficiency v in = 12 v, v out = 1.2 v, v drv = v cin ; no air flow, o/p inductance = 0.33 h 76 78 80 82 84 86 88 90 92 94 03691215182124273033 efficiency (%) output load (a) fsw = 300khz fsw = 400khz fsw = 500khz typical power loss v in = 12 v, v out = 1.2 v, v drv = v cin ; no air flow, o/p inductance = 0.33 h 0 2 4 6 8 10 0 3 6 9 12 15 18 21 24 27 30 33 power loss (w) output load (a) fsw = 300khz fsw = 400khz fsw = 500khz
vishay siliconix SIC778A document number: 63808 s12-1132-rev. b, 21-may-12 www.vishay.com 11 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 for technical support, please contact: powerictechsupport@vishay.com package dimensions notes: 1. use millimeters as t he primary measurement. 2. dimensioning and tolerances conform to asme y14.5m-1994. 3. n is the number of terminals. nd is the number of terminals in x-direction and ne is the number of terminals in y-direction . 4. dimension b applies to plated terminal and is me asured between 0.20 mm and 0.25 mm from terminal tip. 5. the pin #1 identifier must be existed on the top surface of t he package by using indentation ma rk or other feature of package body . 6. exact shape and size of this feature is optional. 7. package warpage max. 0.08 mm. 8. applied only for terminals. vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?63808 . dim millimeters inches min. nom. max. min. nom. max. a (8) 0.70 0.75 0.80 0.027 0.029 0.031 a1 0 - 0.05 0 - 0.002 a2 0.20 ref. 0.008 ref. b (4) 0.20 0.25 0.30 0.078 0.098 0.011 d 6.00 bsc 0.236 bsc e 0.50 bsc 0.019 bsc e 6.00 bsc 0.236 bsc l 0.35 0.40 0.45 0.013 0.015 0.017 n (3) 40 40 nd (3) 10 10 ne (3) 10 10 d2-1 1.45 1.50 1.55 0.057 0.059 0.061 d2-2 1.45 1.50 1.55 0.057 0.059 0.061 d2-3 2.35 2.40 2.45 0.095 0.094 0.096 e2-1 4.35 4.40 4.45 0.171 0.173 0.175 e2-2 1.95 2.00 2.05 0.076 0.078 0.080 e2-3 1.95 2.00 2.05 0.076 0.078 0.080 k1 0.73 bsc 0.028 bsc k2 0.21 bsc 0.008 bsc 40 1 2 x 2 x pin 1 dot b y marking mlp66-40 (6 mm x 6 mm) 10 11 20 21 30 31 56 4 top v ie w bottom v ie w side v ie w a b c d 0.10 c b e 0.10 c a a 0.0 8 c a1 a2 0.41 k2 k1 d2-1 pin #1 dent e2-1 e d2-3 d2-2 e2-3 e2-2 ( n d-1)x e ref. ( n d-1)x e ref. 0.10 m c a b
document number: 64846 www.vishay.com 04-may-09 1 package information vishay siliconix powerpak ? mlp66-40 case outline notes 1. use millimeters as the primary measurement 2. dimensioning and tolerances conform to asme y14.5m. - 1994 3. n is the number of terminals. nd is the number of terminals in x-direction and ne is the number of terminals in y-direction 4. dimension b applies to plated terminal and is measured between 0.20 mm and 0.25 mm from terminal tip 5. the pin #1 identifier must be existed on the top surface of the package by using indentation ma rk or other feature of packag e body 6. exact shape and size of this feature is optional 7. package warpage max. 0.08 mm 8. applied only for terminals 40 1 2 x 2 x pin 1 dot b y marking mlp66-40 (6 mm x 6 mm) 10 11 20 21 30 31 56 4 top v ie w bottom v ie w side v ie w a b c d 0.10 c b e 0.10 c a a 0.0 8 c a1 a2 0.41 k2 k1 d2-1 pin #1 dent e2-1 e d2-3 d2-2 e2-3 e2-2 ( n d-1)x e ref. ( n d-1)x e ref. 0.10 m c a b dim. millimeters inches min. nom. max. min. nom. max. a (8) 0.70 0.75 0.80 0.027 0.029 0.031 a1 0.00 - 0.05 0.000 - 0.002 a2 0.20 ref. 0.008 ref. b (4) 0.20 0.25 0.30 0.078 0.098 0.011 d 6.00 bsc 0.236 bsc e 0.50 bsc 0.019 bsc e 6.00 bsc 0.236 bsc l 0.35 0.40 0.45 0.013 0.015 0.017 n (3) 40 40 nd (3) 10 10 ne (3) 10 10 d2-1 1.45 1.50 1.55 0.057 0.059 0.061 d2-2 1.45 1.50 1.55 0.057 0.059 0.061 d2-3 2.35 2.40 2.45 0.095 0.094 0.096 e2-1 4.35 4.40 4.45 0.171 0.173 0.175 e2-2 1.95 2.00 2.05 0.076 0.078 0.080 e2-3 1.95 2.00 2.05 0.076 0.078 0.080 k1 0.73 bsc 0.028 bsc k2 0.21 bsc 0.008 bsc ecn: t09-0195-rev. a, 04-may-09 dwg: 5986
legal disclaimer notice www.vishay.com vishay revision: 12-mar-12 1 document number: 91000 disclaimer all product, product specifications and data are subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employee s, and all persons acting on it s or their behalf (collectivel y, vishay), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, repres entation or guarantee regarding the suitabilit y of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicable law, vi shay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation specia l, consequential or incidental damages, and (iii) any and all i mplied warranties, including warra nties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of products for certain type s of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in generic applications. such statements are not binding statements about the suitability of products for a particular application. it is the customers responsib ility to validate that a particu lar product with the properties descri bed in the product specification is suitable fo r use in a particular application. parameters provided in datasheets and/or specification s may vary in different applications an d performance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vish ays terms and condit ions of purchase, including but not limited to the warranty expressed therein. except as expressly indicate d in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vi shay product could result in personal injury or death. customers using or selling vishay products no t expressly indicated for use in such applications do so at their own risk and agr ee to fully indemnify and hold vishay and it s distributors harmless from and against an y and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale , including attorneys fees, even if such claim alleges that vis hay or its distributor was negligent regarding th e design or manufacture of the part. please contact authorized vishay personnel t o obtain written terms and conditions regardin g products designed for such applications. no license, express or implied, by estoppel or otherwise, to any intellectual prope rty rights is granted by this document or by any conduct of vishay. product names and markings noted herein may be trad emarks of their respective owners. material category policy vishay intertechnology, inc. hereby certi fies that all its products that are id entified as rohs-compliant fulfill the definitions and restrictions defined under directive 2011/65/eu of the euro pean parliament and of the council of june 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment (eee) - recast, unless otherwis e specified as non-compliant. please note that some vishay documentation may still make reference to rohs directive 2002/95/ ec. we confirm that all the products identified as being compliant to directive 2002 /95/ec conform to directive 2011/65/eu.

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